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ARC HS38: Single- and Multicore CPUs for High-Speed Linux Processing on an ...

This report by the Linley Group describes the Synopsys DesignWare® ARC® HS38 multicore processor for embedded Linux applications.

ARC HS4x and HS4xD CPUs: New Dual-Issue Architecture Boosts Embedded ...

This white paper describes the Synopsys DesignWare® ARC® HS4x and HS4xD series of licensable CPU cores.

Audio Subsystems for Efficient SoC Integration

In this white paper, we discuss the requirements for audio solutions for processing of high-definition (HD) multi-channel audio and detail the challenges involved in building such solutions.

Building an Efficient, Tightly-Coupled Embedded System Using an Extensible ...

This white paper describes how closely coupled memories and processor extensions can be leveraged to improve the power and area of these embedded systems by making the bus infrastructure superfluous.

Configure, Confirm, Ship: Build Secure Processor-Based Systems with Faster ...

Learn how using Tortuga Logic’s Radix-S security verification platform with Synopsys’ ARC Processor IP help ensure that protected systems are free from vulnerabilities.

Custom Processors: A Better Way of Dealing with Design Changes

Learn how custom processors offer the flexibility needed to deal with multiple standards, multiple modes and late design changes as well as help minimize verification effort.

Design of Embedded Vision Processors White Paper

This paper describes how Synopsys' Processor Designer enables an efficient design flow and methodology for hardware RTL and software tool generation from a formal input specification, which can cut...

Designing an Efficient DSP Solution: Choosing the Right Processor and ...

This white paper describes how to generate tight, efficient, and maintainable DSP code for a platform consisting of an IP core based on a specialized instruction-set architecture (ISA) coupled with...

Designing Application-Specific Processors for Wireless Baseband SoCs White Paper

This white paper describes how tool-based ASIP design methodologies automate the generation of the software tool chain, including an optimized software compiler, and the generation of RTL for ASIC ...

Designing ASIPs in Multicore SoCs White Paper

Multicore SoCs integrate dozens of complex functions, each optimized to balance performance, flexibility and energy consumption. ASIPs can offer the best balance. ASIP Designer is a true ...