IP Resources

Synopsys Suggests

Modeling, Measurement, and Verification of PCI Express® 4.0 (Synopsys and...


Learn about the IBIS-AMI model & how PHY features and performance are implemented into the model. See a comparison between IBIS-AMI simulation results & silicon measurements for a 16Gbps PCIe 4.0 ...

LPDDR4 Multi-Channel Architecture


Learn about connecting multiple channels of DRAM, tradeoffs in SoC floorplans, logical to physical addressing, connecting to on-chip buses, and low-power design methods for LPDDR4.

How to Optimize your Application-Specific Processor (ASIP)


Attend this webinar to gain a demonstration of the architectural exploration flow based on IP Designer, Synopsys' ASIP design tool.

Achieving Energy Efficiency for IoT Designs


Learn how new investments in IP help improve system power usage and energy efficiency and enable added functionality for IoT applications including wearable and machine-to-machine devices.

Understanding USB 3.1’s Physical, Link & Protocol Layer Changes


Get an in-depth look at the changes in the USB 3.1 specification’s physical layer, link layer, protocol layer, and hub.

Designing SoCs for USB Type-C Products


Understand the USB Type-C specification from an SoC designer’s perspective, how to add USB Type-C to existing designs and recommendations for new SoC architectures.

Design, Test & Repair Methodology for FinFET-based Memories


Understand the challenges associated with testing FinFET-based memories and new methods to address FinFET-specific defects.

Choosing the Optimal Multiprotocol PHY IP for Your SoC


Learn about the architectural differences between enterprise and consumer multiprotocol PHY and the optimal PHY solution for your SoC that meets your specific design requirements.

Meeting 90-nm to 10-nm Physical IP Design Requirements for Wearables and ...


Understand the 90-nm to 10-nm technology process and IP requirements for wearable/IoT devices and mobile application processors.

Implementing Next-Generation Vision Capabilities to Enhance Your SoC Designs


Learn about the architecture of the new DesignWare Embedded Vision (EV) Processors and the open source vision tools used to program the processors to ensure efficient resource utilization.