Synopsys and Intel Full System PCIe 5.0 Interoperability Success
October 15, 2020 - This video demonstrates industry's first successful system-level PCI Express (PCIe) 5.0 interoperability between the Synopsys DesignWare Controller and PHY IP for PCIe 5.0 and Intel Xeon Scalable ...
October 14, 2020 - In this video learn more about 112Gbps SerDes, why it’s important to examine the performance of these devices in the context of a system, what is acceptable channel loss, and how density can affect...
Demo: Low-Power Machine Learning Inference with DesignWare ARC EM9D Processor IP
September 24, 2020 - See ARC EM9D Processors run a handwriting character recognition neural network graph to infer the letter that is written.
Demo: Combining SLAM and Object Detection with DesignWare ARC EV Processor IP
September 24, 2020 - See how ARC EV Processors combine simultaneous localization and mapping (SLAM) with a neural network engine to build a map of the surroundings while identifying objects.
Demo: Inuitive NU4000 SoC with ARC EV Processor Running SLAM and CNN
September 24, 2020 - Inuitive’s NU4000 3D imaging and vision processor supports high-quality 3D depth processor engine, SLAM accelerators, computer vision, and deep learning by integrating Synopsys ARC EV processor.
Synopsys and SK hynix Discuss HBM2E at 3.6Gbps
September 11, 2020 - In this video interview hear from Keith Kim, Team Leader of DRAM Technical Marketing at SK hynix, discussing the wide adoption of HBM2E at 3.6Gbps and successful collaboration with Synopsys to ...
Latency-Optimized PAM-4 Architecture for Next-Generation PCIe
September 01, 2020 - This video presentation briefly describes how DesignWare IP for PCIe 5.0 is minimizing risk and accelerating time to market, and what Synopsys is doing to help designers prepare for next-generation...
Product Update: PVT Monitor IP
August 31, 2020 - Join Rupal Gandhi to learn about silicon-proven process monitors and voltage/temperature sensor IP from Synopsys. PVT monitors provide real-time feedback to SoC designers.
Product Update: Family of DesignWare Ethernet IP for Time-Sensitive Networking
August 28, 2020 - Hear John Swanson, our product expert, give an update on Synopsys’ DesignWare Ethernet IP for Time-Sensitive Networking (TSN), which is compliant with IEEE standards and enables predictable ...
August 19, 2020 - Memory access is a key consideration in AI system design. Ron Lowman, strategic marketing manager for IP at Synopsys, talks with Semiconductor Engineering about how memory affects overall power ...