Ashling Opella-XD and Ultra-XD for ARC Debug and Trace
January 07, 2020 - Find out how Ashling’s debug tools work with Synopsys’ ARC MetaWare Development Toolkit to provide high-performance real-time trace capabilities for ARC processors
Industry’s First USB 3.2 Gen 2x2 Interoperability Demo--Synopsys & ASMedia
November 15, 2019 - Blazingly fast USB 3.2 Gen 2x2 are ready for your SoC. In this video, you’ll see Synopsys and ASMedia demonstrate the throughput available with DesignWare USB 3.2 IP.
ULSee Real-Time Facial Recognition & Liveness Detection System using ARC EV62...
October 25, 2019 - ULSee demonstrates their UL100 AI module, which integrates DesignWare ARC EV62 Processor IP, performing real-time facial recognition with very low power consumption.
Hardware Security Verification Using Tortuga Logic Radix-S Software at ARC ...
October 25, 2019 - Understand hardware security verification using the Tortuga Radix Software, which allows you to identify system-level security vulnerabilities that can exist at both the hardware and software levels.
Automotive Trends Driving New SoC Architectures
October 25, 2019 - The use of IP is prevalent in today’s new AI-enabled automotive SoCs for safety-critical ADAS applications. Find out why it is essential to use pre-designed, pre-verified, reusable ...
What is USB4? USB, PCIe, and DisplayPort with a Single Type-C Connector
October 14, 2019 - Jeff Ravencraft, President & COO of the USB-IF, and Synopsys discuss the new USB4 specification at USB Developer Days in September 2019.
USB Authentication for More Secure Systems
October 14, 2019 - USB authentication ensures that consumers have the best possible experience when plugging in USB devices. The Authentication specification, an optional security protocol, enables host systems to ...
USB Fast Charging – 100W, Programmable Power Supply, and More
October 14, 2019 - Fast Charging allows smartphones to better manage the charging experience, which is enabled by Fast Charging’s programmable power supply (PPS) feature.
DesignWare 112G Ethernet PHY IP in TSMC N7 Process
September 30, 2019 - This video shows the transmitter and receiver testing of Synopsys’ DesignWare 112G Ethernet PHY IP in TSMC’s N7 process.
September 24, 2019 - Gary Ruggles, senior staff product marketing manager at Synopsys, talks with Semiconductor Engineering about the Compute Express Link standard, why it’s important for high bandwidth in AI/ML ...