IP Resources

Synopsys Suggests

Sino Wealth Cuts Development Time and Meets Aggressive Design Requirements ...

Sino Wealth selected Synopsys' silicon-proven DesignWare Bluetooth PHY IP because it met their key design requirements and quality standards. The DesignWare Bluetooth PHY IP offered better ...

PLSense Achieves 0.45V Operation with Sub-Threshold Technology Implemented on...

Using the ARC EM5D processor-based Smart Data Fusion IP Subsystem and MetaWare Development Toolkit, PLSense quickly and easily integrated their design and achieved first-pass silicon success.

eWBM Passes FIDO U2F Authentication Certification for MS1000 Microcontroller ...

After researching the portfolios of multiple vendors, eWBM selected the Synopsys DesignWare tRoot Secure Hardware Root of Trust, TRNG and SPAcc IP.

Mellanox Achieves First-Pass Silicon Success for NPS-400 Processor with ...

Mellanox chose DesignWare® Interfaces, Processors, Embedded Memories and Logic Libraries for their new processor architecture with first-pass silicon success.

TLi Achieves First-Pass Silicon Success with DesignWare AEON FTP Trim NVM IP ...

The DesignWare AEON FTP Trim NVM IP was used for trimming purposes to adjust sensing values, minimize chip-to-chip variations and improve yield.

Inuitive Achieves First-Pass Silicon Success for NU3000 Multi-Core Signal ...

Inuitive had a small engineering team focused on the areas that differentiated their NU3000 processor, and selected Synopsys DesignWare USB 3.0, DDR, and MIPI IP after evaluating multiple vendors ...

DesignWare UFS, UniPro and M-PHY IP Enable First-Pass Silicon Success for SK ...

By using Synopsys’ DesignWare UFS, UniPro and M-PHY IP, optimized for power and performance, we were able to integrate the IP in two weeks, speed our design schedule by six months and achieve ...

Fuji Xerox Develops Scanned Image Data Processing ASIP for Full-Color Digital...

Fuji Xerox selected Synopsys’ ASIP Designer, the industry’s leading ASIP design tool environment.

MegaChips Meets Aggressive Performance and Time-to-Market Targets for SSD ...

MegaChips chose Synopsys’ DesignWare SATA Device Controller and PHY IP, which met all of their requirements.

Marvell Reduces Networking SoC Die Size by 10% With DesignWare STAR Memory ...

Marvell chose Synopsys’ STAR Memory System due to its MMB processor and Yield Accelerator.