April 14, 2021 - Learn how an integrated digital and analog architecture in 112G SerDes PHY IP can deliver maximum performance and reach in 400G/800G hyperscale data center SoCs.
April 14, 2021 - Learn how implementing facial recognition in edge devices requires efficient, low power processors with flexible support for the latest AI algorithms and graphs.
April 14, 2021 - How ARC EM Processor IP OLM enables address translation and access permission validation with minimal power and area, for data intensive applications.
April 14, 2021 - Learn how in-chip sensors and PVT monitors play a key role in leading-edge SoCs on advanced nodes, delivering performance and reliability benefits throughout the lifecycle.
April 14, 2021 - Learn all about the key features of PCIe 6.0 technology and prepare for a seamless transition using optimized IP.
April 14, 2021 - Learn about the security modules for protecting data in high-performance computing SoCs that use the PCIe 5.0 or CXL 2.0 protocols.
April 12, 2021 - Designing an ASIP is all about designing a processor optimized for PPA with an instruction-set tailored for a domain or set of applications. ASIP Designer strongly leverages access to Synopsys ...
April 09, 2021 - This article highlights the unique features of the MIPI CSI-2, DSI/DSI-2, D-PHY, and C-PHY interfaces, and briefly describes how designers can integrate the interfaces in their SoC designs using ...
April 01, 2021 - Why driver data collected by in-cabin monitoring systems must be included as part of the overall security system.
April 01, 2021 - High-speed interfaces are getting new security requirements to better protect sensitive data and communications.