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SemiEngineering: HBM Takes On A Much Bigger Role

May 18, 2021 - High-bandwidth memory is getting faster and showing up in more designs, but this stacked DRAM technology may play a much bigger role as a gateway for both chiplet-based SoCs and true 3D designs.

Arbe Achieves First-Pass Silicon Success for High-Resolution Imaging Radar ...

(Simplified Chinese) Arbe selected a portfolio of automotive-ready DesignWare IP for their Phoenix chipset. Arbe selected the ARC EM22FS Processor because of its integrated self-checking safety ...

SemiEngineering: 11 Ways To Reduce AI Energy Consumption

May 13, 2021 - Pushing AI to the edge requires new architectures, tools, and approaches.

Flexible USB4-based Interface IP Solution for AI at the Edge

This white paper describes a flexible USB4-based IP solution for edge AI accelerators and SoCs. The IP solution can be used with multiple types of hosts by supporting legacy PCIe 4.0, USB4, USB 3.x...

DesignWare 3.3 V/1.8 V LVDS RX IO IP GLOBALFOUNDRIES® 12LP Process

The Synopsys DesignWare® IO 3.3/1.8 V Low Voltage Differential Signalling (LVDS) Receiver (RX) library IP is used to build a LVDS based interface for high-speed interconnect applications.

DesignWare 3.3 V/1.8 V I2C IO IP with 5V Fail Safe for GLOBALFOUNDRIES® ...

The DesignWare® Inter-Integrated Circuit (I2C) IO IP pad is an open-drain bi-directional IO cell designed for the two-line I2C interface. As an open-drain design, the cell requires an external ...

Super Resolution with ARC EV Processor IP

May 06, 2021 - Interested in upscaling images with AI? Join Gordon Cooper for an update on SR-GAN with ARC EV Processors.

SemiEngineering: Meeting Automotive Functional Safety Requirements With GPIOs

May 06, 2021 - Automotive systems are transforming, putting more demands on a single point of potential failure.

Synopsys Completes Acquisition of MoreThanIP

May 04, 2021 - The acquisition expands Synopsys' DesignWare® Ethernet Controller IP portfolio with the addition of MAC and PCS for 200G/400G and 800G Ethernet, providing customers with a complete low-latency, ...

What’s Hot: DesignWare Logic Library IP for TSMC N5

April 29, 2021 - Designing for N5? Josefina Hobbs details the latest info and customer results on Logic Library IP for TSMC N5. Whether performance, power, area or routability are your key concerns, Synopsys ...