IP Resources

Sort by

Synopsys Suggests

Addressing IP Integration & Software Development Challenges to Accelerate SoC...

This white paper will explore the issues facing SoC designers as they address SoC complexity and time-to-market challenges. It will discuss the use of third-party IP while noting that high-quality ...

Designing Application-Specific Processors for Wireless Baseband SoCs White Paper

This white paper describes how tool-based ASIP design methodologies automate the generation of the software tool chain, including an optimized software compiler, and the generation of RTL for ASIC ...

Real-Time Trace: A Better Way to Debug Embedded Applications White Paper

This whitepaper shows the benefits of debugging with ‘real-time trace’ hardware assistance, including how it can vastly reduce the amount of time needed to track down problems in the code, and ...

A Method to Quickly Assess the Analog Front-End Performance in Communication ...

This white paper outlines a simplified method to determine if the electrical characteristics of any given AFE are adequate for the targeted application such as broadband signal transceivers in the ...

ARC HS38: Single- and Multicore CPUs for High-Speed Linux Processing on an ...

This report by the Linley Group describes the Synopsys DesignWare® ARC® HS38 multicore processor for embedded Linux applications.

How VXLAN-Based Ethernet IP Solves Cloud Computing Network Bottlenecks White ...

Cloud and mega data center operators are redesigning data center networking and compute architectures to utilize virtual environments for higher performance and to reduce the cost and time required...

Meeting the USB IP Requirements of SoC Designs from 180-nm to 14/16-nm FinFET

This white paper addresses the five critical challenges facing designers of USB IP who need to keep pace with the process technology changes as well as the USB standard evolution.

Reliability, Availability and Serviceability (RAS) for Memory Interfaces

This white paper reviews some of the ways that errors can occur in the DDR DRAM memory subsystem and discusses current and future methods of improving RAS in the presence of these errors.

Developing High-Reliability Reprogrammable NVM IP for Automotive Applications

This paper helps IC designers make informed choices for their automotive designs, from developing the NVM IP in-house to selecting the optimal IP supplier.

Designing ASIPs in Multicore SoCs White Paper

Multicore SoCs integrate dozens of complex functions, each optimized to balance performance, flexibility and energy consumption. ASIPs can offer the best balance. ASIP Designer is a true ...