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Addressing the Evolving Technology Needs of Cloud Data Centers with IP

In this paper we will examine some of the challenges system on chip (SoC) developers are facing to meet modern cloud infrastructure demands, and the tools and technologies that can be used to ...

Addressing the Rapid Growth of the Storage Market with ARC® Processors

June 22, 2017 - Learn about trends in the storage market and find out how Synopsys' performance-efficient DesignWare® ARC® EM and HS processors enable engineers to create adaptable and scalable SSD designs that ...

Addressing Three Critical Challenges of USB Type-C Implementation

This white paper describes these key challenges and suggests solutions for designers of USB Type-C products and SoCs with native USB Type-C support.

Adesto Introduces EcoXiP™: the Ultimate Memory Solution for Intelligent IoT ...

September 27, 2016 - New EcoXiP Non-Volatile Memory Sets a New Standard for Performance, Cost and Power for eXecute-in-Place IoT Edge Devices

Agere/Synopsys: Integrating a PCI Express Digital IP Core into a Gigabit ...

This paper discusses the integration and system verification challenges encountered when integrating a PCI Express digital intellectual property (IP) core into a Gigabit Ethernet design.

AI SoC Architectures for Smart, Efficient Edge Computing

April 30, 2020 - To understand the challenges of edge computing, we need to understand what is driving its development, the types of edge computing applications, and how companies are building and deploying edge ...

AI SoC Case Study: Emerging Neural Networks Drive IP Innovation

September 01, 2020 - This presentation will describe how leading AI SoC customers are supporting emerging requirements for fast-changing neural networks. Attendees will learn about successful implementations of how IP,...

AI SoC Chats: Host Processor Interconnect IP for AI Accelerators

July 31, 2020 - To support host-to-AI accelerator connectivity, AI chipsets can use PCI Express, CCIX, and/or CXL, and each have their benefits. Learn how to find the right interconnect for your AI SoC design.

AI SoC Chats: Memory Interface IP - DDR, LPDDR, HBM, GDDR

July 31, 2020 - When building AI SoCs, how do you choose the optimal memory interface? Learn about the market trends and challenges for DDR, LPDDR, HBM, and GDDR, and how Synopsys DesignWare IP can help.

AI SoC Chats: Primitive Math IP for AI

July 31, 2020 - Learn about the market trends and challenges around primitive math functions (floating point and integer math) in AI chipset development, and how DesignWare IP can help.