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Synopsys Announces Industry's First ASIL D Ready Dual-Core Lockstep Processor...

March 07, 2017 - New ARC EM Safety Islands Simplify Development and Accelerate ISO 26262 Certification of Advanced Driver Assistance Systems, Radar and Sensor Applications

Rambus Selects Synopsys' ARC EM Processors for Embedded Security Platform

February 02, 2017 - ARC EM Processors' Leading Performance Efficiency Delivers Area and Power Savings for IoT and Mobile Applications

Starblaze Achieves First-Pass Silicon Success for Storage SoC with Synopsys ...

January 26, 2017 - DesignWare ARC HS38 Dual-Core Processor, DDR4 and PCI Express 3.1 IP Enable Higher Performance and Lower Power for Starblaze's MB1000 Enterprise SSD Controller

Synopsys Introduces ARC Security Processors for Low-Power Embedded Applications

September 12, 2016 - DesignWare ARC SEM Security Processors with SecureShield Technology Protect Against Side-Channel Attacks, IP Theft and Data Breaches

Gridbee Achieves First-Pass Silicon Success with Synopsys' DesignWare ARC ...

August 24, 2016 - Silicon-Proven ARC EM Processor Enables Ultra-Low Power Wireless Module for Industrial IoT Applications

Synopsys’ Next-Generation ARC Embedded Vision Processors Boost Performance up...

June 01, 2016 - DesignWare EV6x Family Integrates Scalar, Vector Processors and a Convolution Neural Network Engine for High Accuracy Vision Processing

Synopsys Expands Portfolio of ARC Processors for Safety-Critical Automotive ...

May 11, 2016 - ASIL D Ready Certified ARC EM Processors with Safety Enhancement Package Accelerate ISO 26262 Certification Time by up to Six Months

Synopsys Launches New IP Subsystem to Accelerate Data Fusion Processing in ...

January 27, 2016 - DesignWare Smart Data Fusion IP Subsystem Integrates Latest ARC EM DSP Processors, Peripherals and Software to Boost Signal Processing Performance and Reduce Energy Consumption

Synopsys Introduces Enhanced Security Package for DesignWare ARC EM Processors

November 04, 2015 - New Option Enables Implementation of a Trusted Execution Environment on a Single, Ultra-Low Power ARC EM Core