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DesignWare XAUI PHY Datasheet

The DesignWare® XAUI PHY IP, designed for the latest high-speed backplanes, supports the 10 Gigabit Ethernet standards that are commonly used in highspeed communications applications.

DesignWare IP for Automotive SoCs Brochure

January 01, 2019 - Synopsys IP and prototyping solutions provide the fastest path from proof-of-concept to verified SoC for automotive applications.

DesignWare Multi-Protocol 6G PHY Datasheet

The multi-lane DesignWare® Multi-Protocol 6G PHY IP is part of Synopsys’ high performance multi-rate transceiver portfolio, meeting the growing needs for small area, low bill of materials (BOM) ...

DesignWare IP for PCI Express 2.x for 28FD-SOI Datasheet

The DesignWare® PHY IP for PCI® Express® (PCIe) 2.1, operating at 5.0 Gbps, meets the demand for both increased bandwidth and narrower interconnect links in the data center, storage, high-end ...

DesignWare IP for PCI Express 3.x for 28FD-SOI Process Datasheet

The DesignWare® PHY IP for PCI Express® 3.1, operating at 8.0 Gbps, includes Synopsys’ high-speed, high-performance transceiver and provides a cost-effective solution that is designed to meet the ...

DesignWare IP for PCI Express to ARM AMBA AHB Interconnect

The DesignWare® IP for PCI Express® to ARM AMBA® AHB™ Interconnect enables designers who use the ARM® ARM AMBA AHB on-chip bus to easily add external connectivity via PCI Express to their SoC designs.

DesignWare IP for PCI Express to AMBA AXI3/AXI4 Bridge Datasheet

The DesignWare® IP for PCI Express® to ARM® AMBA® AXI3™/AXI4™ Bridge enables designers who use the AMBA AXI3 or AXI4 on-chip bus to easily add external connectivity via PCI Express to their SoC ...

DesignWare IP for PCI Express Single Root I/O Virtualization Datasheet

The DesignWare® IP for PCI Express® (PCIe) with Single Root I/O Virtualization (SR-IOV) is an add-on feature which extends the DesignWare End Point and Dual Mode Controller IP for PCI Express to ...

IP Prototyping Kit for JEDEC UFS Host

The DesignWare® IP Prototyping Kits, part of the IP Accelerated initiative, center around a complete, out-of-the-box reference design that consists of a validated IP configuration and necessary ...

DesignWare IP Prototyping Kit for MIPI DSI Host

The DesignWare® IP Prototyping Kits, part of the IP Accelerated initiative, center around a complete, out-of-the-box reference design that consists of a validated IP configuration and necessary ...