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SemiEngineering: Winners And Losers At The Edge

July 01, 2020 - No company owns this market yet — and won’t for a very long time.

Keys to Achieving Maximum Throughput and Lowest Latency for PCI Express 5.0 ...

June 30, 2020 - In this webinar, our SVP, John Koeter, highlights the market trends and use cases for high-performance computing (HPC) SoCs.

Product Update: High-Performance DesignWare Memory Interface IP

June 25, 2020 - Get the latest update on Synopsys' DesignWare Memory Interface IP for DDR5, LPDDR5, and HBM2/2E and how you can enable your DRAMs with the highest-performance, lowest-power, and lowest-area IP ...

Product Update: Protect IoT SoCs with DesignWare OTP NVM IP

June 25, 2020 - Join Krishna Balachandran in this discussion on securing SoC data and IoT connections using Synopsys DesignWare OTP NVM IP. With more than 12 years of development and deployment by 500+ customers, ...

Synopsys Awarded DARPA Contract for Automatic Implementation of Secure ...

June 25, 2020 - Advances SoC Design by Integrating Scalable Hardware Security Mechanisms Leveraging Academic and Commercial Partner Expertise, and Synopsys' Industry-Leading EDA Platforms and IP

Navigating Between DDR5, LPDDR5, and HBM2/2E IP to Meet Your Design Goals

June 23, 2020 - In this webinar, our SVP, John Koeter, highlights the different market trends and memory use cases for high-performance computing SoC (HPC) designs.

Product Update: Highly Optimized DesignWare 112G/56G Ethernet PHY IP

June 19, 2020 - Get the latest update on Synopsys’ PAM-4 DesignWare 112G/56G Ethernet PHY IP with optimized power, performance, and area, enabling true long reach connectivity in 400G/800G high-performance ...

The New Frontier of Die-to-Die Interface IP: What You Need to Know for ...

June 16, 2020 - In this webinar our SVP, John Koeter, summarizes the market trends and die-to-die use cases for high-performance computing (HPC) SoC designs.

SemiEngineering: Essential DDR5 Features Designers Must Know

June 11, 2020 - Learn more about how DDR5 offers new reliability, availability, and serviceability features for channel robustness at increased speeds.

SemiEngineering: Fundamental Changes In Economics Of Chip Security

June 10, 2020 - More and higher value data, thinner chips and a shifting customer base are forcing long-overdue changes in semiconductor security.