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EZchip Develops C-Programmable NPS-400 Network Processor with Synopsys ...

EZchip selected the ARC 770D Processor becauseof its superior performance efficiency (MHz/mW and MHz/mm2) and memory management unit (MMU) for Linux support, as well as its extensibility, which ...

Fairchild Achieves First-Pass Silicon Success and Meets Project Schedule for ...

Fairchild selected Synopsys’ DesignWare USB 2.0 nanoPHY IP because it was low in power and area. In addition, Fairchild was also impressed with the technical features of the PHY IP including the ...

Fujitsu Laboratories Designs Custom DSP for Software-Defined Radio with ...

Synopsys' Processor Designer provided the development tools and automated design methodology to achieve the quality of results expected by the Fujitsu Laboratories design team.

Fuji Xerox Develops Scanned Image Data Processing ASIP for Full-Color Digital...

Fuji Xerox selected Synopsys’ ASIP Designer, the industry’s leading ASIP design tool environment.

Case Study: Guangdong Nufront CSC CO., LTD and DesignWare USB IP

Selected DesignWare USB IP due to its extensive silicon success, quality, and ease of integration effort.

GUC Achieves Silicon Success with DesignWare MIPI & DDR IP, Enables Light to ...

Leveraging DesignWare MIPI and DDR IP, GUC accelerated their design schedule by weeks and met Light’s stringent power, performance and area requirements.

Synopsys and Global Unichip - GUC Meets Aggressive Time-to-Market Deadlines ...

After evaluating several offerings based on aggressive selection criteria, including quality, ability to meet power and area requirements, and a robust feature set, GUC selected Synopsys’ ...

GUC Delivers Low Power, High-Performance Solid State Drive SoC Platform with ...

GUC selected Synopsys DesignWare SATA IP solution because the PHY is 50% lower in power and 30% smaller in area compared to competitive offerings.

Case Study: Hisense and DesignWare USB IP

Selected DesignWare USB IP due to its quality, completeness of solution, and previous experience with Synopsys IP.

Silicon-Proven DesignWare USB 2.0 PHY IP Lowers Risk and Enables First Pass ...

The Synopsys DesignWare USB 2.0 PHY IP provided Hisilicon with a core that met their small area, low power and high yield requirements.