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DesignWare Embedded Endpoint Controller IP for PCI Express

The DesignWare® Embedded Endpoint Controller IP for PCI Express® (PCIe®) implements a configurable and scalable embedded endpoint, while supporting all required features of the PCI Express 5.0, ...

DesignWare Dual Mode Controller IP for PCI Express Datasheet

The DesignWare® Dual Mode (DM) IP for PCI Express® (PCIe®) implements the port logic required to build a Root Port or Endpoint device, and is compliant to the PCI Express 4.0, 3.1, 2.1, and 1.1 and...

DesignWare Endpoint Controller IP for PCI Express Datasheet

The DesignWare® Endpoint (EP) Controller IP for PCI Express® (PCIe®) implements a configurable and scalable Endpoint that is compliant to the PCI Express 4.0, 3.1, 2.1, 1.1 and PHY Interface for ...

DesignWare Multi-Port Switch IP for PCI Express

The DesignWare® Multi-Port Switch IP for PCI Express implements the switch logic required to build a switch or bridge device leveraging the Synopsys DesignWare Switch Port IP and DesignWare ...

DesignWare IP Root Port Controller IP for PCI Express Datasheet

The DesignWare Root Port Controller IP for PCIe implements a configurable and scalable root port necessary to build a root complex application, and is compliant to the PCIe 4.0, 3.1, 2.1, 1.1 and ...

DesignWare Switch Port Controller IP for PCI Express Datasheet

The DesignWare® Switch Port (SW) Controller IP for PCI Express® (PCIe®) implements the port logic required to build a switch or bridge device, and is compliant to the PCI Express 4.0, 3.1, 2.1, 1.1...

DesignWare XAUI PHY Datasheet

The DesignWare® XAUI PHY IP, designed for the latest high-speed backplanes, supports the 10 Gigabit Ethernet standards that are commonly used in highspeed communications applications.

DesignWare IP for Automotive SoCs Brochure

January 01, 2019 - Synopsys IP and prototyping solutions provide the fastest path from proof-of-concept to verified SoC for automotive applications.

DesignWare Multi-Protocol 6G PHY Datasheet

The multi-lane DesignWare® Multi-Protocol 6G PHY IP is part of Synopsys’ high performance multi-rate transceiver portfolio, meeting the growing needs for small area, low bill of materials (BOM) ...

DesignWare IP for PCI Express 2.x for 28FD-SOI Datasheet

The DesignWare® PHY IP for PCI® Express® (PCIe) 2.1, operating at 5.0 Gbps, meets the demand for both increased bandwidth and narrower interconnect links in the data center, storage, high-end ...