IP Resources

Sort by

Synopsys Suggests

Synopsys' Next-Generation DesignWare Data Converter IP Delivers 50 Percent ...

March 21, 2011 - High-performance 10/12-bit ADCs and 14-bit DACs Enable Easy Integration into Broadband Wireless and Wireline Communication SoCs

Synopsys Unveils Industry's First Complete Audio IP Subsystem

March 26, 2012 - Integrated, Configurable Hardware and Software Solution Enables "Drop-in" Audio Functionality Supporting Latest Audio Standards

Synopsys DesignWare IP for PCI Express Used as the Gold Standard in Intel Lab...

August 14, 2008 - Proven Interoperability Lowers Risk of Integrating PCI-SIG I/O Virtualization Technology into Enterprise Computing SoCs

Synopsys Enhances DesignWare DDR PHY IP with Service to Verify Signal Integrity

February 25, 2009 - Customized Report to Help Designers Verify DDR3/2 Timing Budgets and Ensure Electrical Signaling Robustness

Synopsys First to Announce DDR3 IP with Support for 2133 Mbps Data Rates and ...

September 09, 2009 - DesignWare DDR3/2 PHY and Controller IP Address Both Performance and Low Power Enhancements Planned for the DDR3 SDRAM Standard

Mellanox and Synopsys Demonstrate Industry’s First PCIe 4.0 Interoperability

March 02, 2015 - Mutual Technology Leadership Lowers Risk for Designers Implementing16GT/s PCI Express Protocol

Synopsys Embedded Vision Processor IP Quadruples Neural Network Performance ...

June 26, 2017 - Enhanced DesignWare EV6x Family Delivers Up to 4.5 TeraMACs/sec for Real-Time Vision Processing

Synopsys’ New DesignWare ARC HS Processors for Next-Generation Embedded Systems

November 05, 2013 - New Performance-Efficient Design Optimized for Maximum DMIPS/mm2 and DMIPS/milliwatt

DesignWare 12-bit, 160 MSPS 2.5V Dual Current Steering DAC Datasheet

High performance, compact 12-bit 160 MHz current steering IQ-DAC IP instantiated in 40-nm CMOS technology supplied at 1.1V / 2.5V.