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A Dual-Mode Error-Correcting Code Solution for 50Gbps Ethernet

This paper explains how a common Reed-Solomon Forward Error Correction implementation in the Ethernet physical layer can help SoC designers keep silicon footprint small and power consumption low, ...

A Method to Quickly Assess the Analog Front-End Performance in Communication ...

This white paper outlines a simplified method to determine if the electrical characteristics of any given AFE are adequate for the targeted application such as broadband signal transceivers in the ...

A Survival Guide for Selecting High-Quality IP

In this paper we will explore three important determinants of IP quality.

Abilis Achieves First-Pass Silicon Success for Secure Media Processor Using ...

Abilis was able to fulfill their time-to-market requirements with Synopsys’ silicon-proven DesignWare Interface IP, ARC Processors and tools, Synopsys’ consulting services and Lynx Design System.

Abilis Systems Achieves First-Pass Silicon Success with DesignWare ARC ...

December 09, 2013 - Silicon-Proven DesignWare IP, Lynx Design System and Consulting Services Reduce Integration Risk and Reduce Time-to-Market by Three Months

AC 2019 Interview: Functional Safety Requirement

June 12, 2019 - Interview with Yervant Zorian from Synopsys at DAC 2019. Yervant discusses functional safety with ChipTV's Sean O'Kane at DAC in Las Vegas.

Accelerate Automotive Design with DesignWare ARC EV6x Embedded Vision ...

April 03, 2019 - Check out the DesignWare ARC EV6x Embedded Vision Processor IP running algorithms for automotive applications for object detection and classification as well as motion tracking.