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Designing an Efficient DSP Solution: Choosing the Right Processor and ...

This white paper describes how to generate tight, efficient, and maintainable DSP code for a platform consisting of an IP core based on a specialized instruction-set architecture (ISA) coupled with...

Safety in SoCs: Accelerate ISO 26262 Certification with Processor IP White Paper

This white paper outlines the key requirements for ISO 26262 certification and demonstrates how to accelerate the development of safety-critical IP and SoCs through the use of out-of-the-box ...

Using an Embedded Vision Processor to Build an Efficient Object Recognition ...

This white paper gives a brief introduction to the components of a vision processing system.

Rapid Architectural Exploration in Designing Application-Specific Processors ...

This white paper explains the architectural tradeoffs that are available to an ASIP designer, how to trade off performance vs. area, and why an ASIP design can still maintain full C-programmability...

Designing Application-Specific Processors for Wireless Baseband SoCs White Paper

This white paper describes how tool-based ASIP design methodologies automate the generation of the software tool chain, including an optimized software compiler, and the generation of RTL for ASIC ...

Real-Time Trace: A Better Way to Debug Embedded Applications White Paper

This whitepaper shows the benefits of debugging with ‘real-time trace’ hardware assistance, including how it can vastly reduce the amount of time needed to track down problems in the code, and ...

ARC HS38: Single- and Multicore CPUs for High-Speed Linux Processing on an ...

This report by the Linley Group describes the Synopsys DesignWare® ARC® HS38 multicore processor for embedded Linux applications.

Designing ASIPs in Multicore SoCs White Paper

Multicore SoCs integrate dozens of complex functions, each optimized to balance performance, flexibility and energy consumption. ASIPs can offer the best balance. ASIP Designer is a true ...

Ultra Low-Power 9D Sensor Fusion Implementation White Paper

Learn how to implement a power-efficient 9D fusion algorithm on an IP subsystem: a processor core that is augmented with hardware accelerators.

Building an Efficient, Tightly-Coupled Embedded System Using an Extensible ...

This white paper describes how closely coupled memories and processor extensions can be leveraged to improve the power and area of these embedded systems by making the bus infrastructure superfluous.