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The New CXL Standard

September 24, 2019 - Gary Ruggles, senior staff product marketing manager at Synopsys, talks with Semiconductor Engineering about the Compute Express Link standard, why it’s important for high bandwidth in AI/ML ...

New ARC EV7x Vision Processor IP with DNN for 35 TOPS Performance

September 16, 2019 - The new EV7x Processor IP family with DNN accelerator offers performance up to 35 TOPS. The DNN can scale to 14,080 MACs with improved utilization, performance, bandwidth & power over EV6x. The ...

7-nm DesignWare 56G Ethernet PHY IP Performance Results

September 04, 2019 - This video shows the performance and capabilities of Synopsys’ DesignWare 56G Ethernet PHY IP in 7-nm FinFET process.

Synopsys Demo of Performance Scaling On the ARC EV6x Embedded Vision ...

August 12, 2019 - Whether you need 880, 1760, 3520, or more MACs in your CNN engine, DesignWare ARC EV6x processor IP has you covered. See how the flexible configurations provide the right level of performance for ...

Synopsys Demo of ASIL-D Ready DesignWare ARC EV6x Embedded Vision Processor ...

August 12, 2019 - Designing automotive SoCs? This new video shows the award-winning DesignWare ARC EV6x processor IP for safety-critical applications used for drowsiness detection, object detection, and lane detection.

Synopsys and Inuitive Demonstration of DesignWare ARC EV6x Processor IP in ...

August 12, 2019 - Developing intelligent vision applications? Check out this new demo video with Inuitive – they integrated DesignWare ARC EV6x processor IP in their NU4000 chip, and it’s used for AR/VR, robotics, ...

PCIe 5.0 Interoperability Success with DesignWare IP and Intel Test Chip

July 24, 2019 - This video features Synopsys’ DesignWare IP for PCIe 5.0 interoperating with Intel’s 10-nm test chip running at 32GT/s data rates while operating at the L0 power state.

End-to-End System with DesignWare IP for PCIe 5.0 at 32GT/s

July 24, 2019 - This demo shows Synopsys’ complete PHY and controller IP solutions for PCI Express (PCIe) 5.0 operating at 32GT/s.

DesignWare PHY IP for PCIe 5.0 at 32GT/s Performance Across Multiple Channels

July 24, 2019 - This video shows Synopsys’ PHY IP for PCI Express (PCIe) 5.0 performance at 32GT/s data rates across Samtec’s ExaMax backplane and Amphenol’s’ CEM 5.0 connector.

Join us at ARC Summit 2019

July 08, 2019 - Synopsys ARC Processor Summit Silicon Valley is a single-day event consisting of multiple tracks with presentations and demos from Synopsys experts, ARC users and ARC ecosystem partners. Attendees ...