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DesignWare CCIX Controller IP Datasheet

The DesignWare® CCIX Controller IP implements the port logic required to build a root port, endpoint, switch or dual mode device

DesignWare CCIX IP Complete Solution Datasheet

Synopsys’ complete DesignWare CCIX IP solution consisting of controller, PHY and verification IP, delivers data transfer rates up to 25Gbps and supports cache coherency for high-performance cloud ...

DesignWare Enterprise Ethernet MAC Controller IP

The DesignWare® Enterprise Media Access Controller (MAC) Controller IP (XLGMAC) is specifically designed for easy integration with 1G/10G/25G/40G/50G/100G Ethernet host applications.

DesignWare Ethernet MAC 10/100/1000 Universal Datasheet

The DesignWare Ethernet MAC 10/100/1000 Universal core is designed to support high-performance applications such as routers and network storage applications.

DesignWare Ethernet MAC 10/100 Universal Datasheet

The DesignWare® Ethernet MAC 10/100 Universal intellectual property (IP) core implements the link layer of an Open System Interconnection (OSI) Ethernet system.

DesignWare XGMAC 10G Ethernet MAC Datasheet

The DesignWare® XGMAC IP is specifically designed for easy integration with 1G/2.5G/5G/10G Ethernet host applications, and it can be configured as MAC only, with a simple FIFO interface on the ...

DesignWare Ethernet PCS Datasheet

The DesignWare Ethernet PCS IP provides an interface between the Media Access Control (MAC) and Physical Medium Attachment Sublayer (PMA) through a Media Independent Interface (MII).

DesignWare Multi-Protocol 12G PHY IP Datasheet

The multi-channel DesignWare® Multi-Protocol 12G PHY IP is part of Synopsys’ high-performance multi-rate transceiver portfolio, meeting the growing needs for high bandwidth in enterprise applications.

DesignWare Multi-Protocol 16G PHY IP Datasheet

The multi-lane DesignWare® Multi-Protocol 16G PHY IP is part of Synopsys’ high-performance multi-rate transceiver portfolio, meeting the growing needs for high bandwidth and low latency in ...

DesignWare Multi-Protocol 25G PHY IP Datasheet

The multi-lane DesignWare® Multi-Protocol 25G PHY IP is part of Synopsys’ high-performance multi-rate transceiver portfolio, meeting the growing needs for high bandwidth and low latency in ...