The objective of this whitepaper is to equip the reader with a broad understanding of PCI Express and the design challenges essential to successful PCIe implementation.
The old school of analog designers, exemplified by pioneer Bob Pease, is becoming an extinct species. But the demand for analog/mixed-signal IP blocks has never been greater, especially at 65 nm ...
This whitepaper describes several types of flexible tradeoffs available to designers, including the benefits of specifying complex floating-point operations rather than multiple separate operations.
This whitepaper provides a brief history of the SDRAM, discusses the design considerations for implementing a DDRn controller and PHY, and describes how a complete IP solution can help speed time ...
Having access to Synopsys’ industry leading tools, IP, and services enabled Teradici to achieve first silicon success.
Ralink turned to Synopsys to provide them with a PCI Express IP solution that was up to 50% lower in power consumption and 20% smaller in area than competitive offerings.
The highly configurable DesignWare USB and Ethernet IP solution allowed ST to easily configure and integrate the core within weeks.
DesignWare IP helped iVivity achieve their chip goals including reducing power by 40%, while doubling the chip performance and lowering the silicon cost compared to previous generations of chips.
After evaluating other vendors, SiCortex chose Synopsys to provide them with a high quality, silicon-proven IP solution for PCI Express.
After an introduction to circuit and process trends in deep sub-micron technologies, this article will present a complete protocol solution using the high speed memory DDR2 interface as an example.