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Implementing Floating-Point IP for the Right Accuracy and Quality of Results ...

This whitepaper describes several types of flexible tradeoffs available to designers, including the benefits of specifying complex floating-point operations rather than multiple separate operations.

DDR SDRAM: A Low Cost, Yet Increasingly Complex Off-Chip Memory Solution for ...

This whitepaper provides a brief history of the SDRAM, discusses the design considerations for implementing a DDRn controller and PHY, and describes how a complete IP solution can help speed time ...

Combination of Tools, IP and Services Help Teradici Achieve First Silicon ...

Having access to Synopsys’ industry leading tools, IP, and services enabled Teradici to achieve first silicon success.

Complete DesignWare IP for PCI Express Helps Reduce Power Consumption and ...

Ralink turned to Synopsys to provide them with a PCI Express IP solution that was up to 50% lower in power consumption and 20% smaller in area than competitive offerings.

Synopsys' DesignWare IP Helps STMicroelectronics Speed Time-to-Market for ...

The highly configurable DesignWare USB and Ethernet IP solution allowed ST to easily configure and integrate the core within weeks.

High Quality DesignWare IP for PCI Express, XAUI and DDR Lowers Power and ...

DesignWare IP helped iVivity achieve their chip goals including reducing power by 40%, while doubling the chip performance and lowering the silicon cost compared to previous generations of chips.

High Quality DesignWare IP for PCI Express Helps SiCortex Enable First Pass ...

After evaluating other vendors, SiCortex chose Synopsys to provide them with a high quality, silicon-proven IP solution for PCI Express.

Implementing Physical Layer Connectivity IP in Deep Sub-Micron Technologies

After an introduction to circuit and process trends in deep sub-micron technologies, this article will present a complete protocol solution using the high speed memory DDR2 interface as an example.

High Performance Connectivity IP: Avoiding Pitfalls When Selecting an IP Vendor

In this paper, we will discuss how to select a third party IP vendor, how to verify third party IP, and some of the gotcha’s when integrating third party IP, with a special focus on the ...

Reducing AMBA-based SoC Design Time by More Than 50% Using coreAssemblerΓäó

This article describes how using a knowledge-based IP design and verification flow with coreAssembler can greatly reduce the time needed to assemble, configure, verify and implement a configurable ...