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Tenstorrent Achieves First-Pass Silicon Success for High-Performance AI ...

July 15, 2020 - High-Quality DesignWare Interface and Processor IP for Efficient Real-Time Connectivity and Machine Learning Processing Accelerate Design Schedule and Lower Risk

Test Methods to Verify Latest High-speed Communications Technologies to be ...

January 30, 2019 - Solutions Supporting PCI Express 3.0/4.0/5.0 and Ethernet PAM4 Among Demonstrations to be Given by Global Test Leader at Premier Engineering Show

Testing Embedded MRAM IP for SoCs

The challenges of embedded memory test and repair are well known, including maximizing fault coverage to prevent test escapes and using spare elements to maximize manufacturing yield. With the ...

Testing PCI Express 5.0 PHY Transmitter Performance Without Analysis Software

This white paper explains how to characterize PCIe 5.0 PHY designs to avoid issues such as signal integrity and reliability prior to manufacturing.

Testing PCI Express® 5.0 PHY Receiver Performance in the Absence of a ...

This white paper describes a methodology for jitter tolerance testing without using the controller to negotiate a link. In addition, the paper outlines a procedure for calibrating the stressed eye ...

The Basics of Foundation IP for Automotive ICs

Understand the functional safety, reliability and quality standards for automotive ICs, and how embedded memories and logic libraries can influence your product’s success.

The Eyes Have it: A Mixed-Signal IP Blog

Mixed-signal PHY IP, including trends and design challenges.Navraj Nandra