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Synopsys DesignWare DDR multiPHY IP Supports Six DDR Standards in a Single PHY

April 07, 2010 - New DDR multiPHY Allows One Chip to Target Multiple Applications

Synopsys' DesignWare SuperSpeed USB 3.0 IP Receives USB-IF Certification

March 31, 2010 - Fully integrated DesignWare IP Lowers Design Risk and Enables Interoperability of USB 3.0-Enabled Products

K-Micro Meets High-Performance Requirements for Home Networking SoCs with ...

After looking at all the key factors including industry leadership, IP quality, features and support, Synopsys was the clear choice.

SuperSpeed Your SoCs with USB 3.0 IP

This whitepaper provides a comparison between USB 3.0 and USB 2.0, highlighting the new capabilities and advancements that have been made with this next-generation technology.

Synopsys Launches DesignWare HDMI 1.4 Tx/Rx Controller and PHY IP Solutions ...

January 25, 2010 - IP Supports HDMI Ethernet and Audio Return Channel, 3D Formats, Real-Time Content Signaling, 4K x 2K Resolution Mode, and 10.2 Gbps Aggregate Bandwidth

Synopsys Expands DesignWare IP Portfolio with MIPI IP Solutions

January 25, 2010 - Silicon-Proven 3G DigRF, CSI-2 Controller and D-PHY Accelerate Development of Mobile Devices

DesignWare SATA AHCI Host Controller - Understanding Multi-Port Configuration...

This application note describes how to configure and connect the DesignWare® SATA AHCI IP core to the Synopsys PHY in a multi-port AHB-based configuration, and provides an analysis of the expected ...

Synopsys Announces DesignWare Protocol Analyzer for Verification of ...

January 13, 2010 - New Verification IP Capability Speeds Time-to-Market by Simplifying Debug of USB 3.0 Interfaces

Express Yourself

January 08, 2010 - Expressing" their views on PCI Express, IP and related trends.Scott Knowlton & Richard Solomon